1. Technical Field
The invention relates to a fly-back power converting apparatus. Particularly, the invention relates to a fly-back power converting apparatus capable of stably output ting power.
2. Related Art
In a conventional fly-back power converting apparatus, a control mechanism is set for a current generated on a power transistor, so as to prevent a phenomenon of over current.
In the conventional fly-back power converting apparatus, a detecting voltage is generated according to a magnitude of the current on the power transistor, and the detecting voltage is compared with a predetermined standard voltage. The standard voltage is generated according to a threshold value, and the threshold value is set according to a maximum current allowed to be generated by the power transistor. Referring to FIG. 1, FIG. 1 is a waveform diagram of the detecting voltage of the conventional fly-back power converting apparatus. According to FIG. 1, it is known that when a detecting voltage VCS generated according to the magnitude of the current on the power transistor is not less than a standard voltage VCL, the fly-back power converting apparatus activates a current limiting mechanism. However, due to a delay effect caused by internal circuit of the fly-back power conversion apparatus, the current limiting mechanism is activated after the detecting voltage VCS is not less than the standard voltage VCL for a delay time td. Now, the detecting voltage VCS exceeds the standard voltage VCL by an offset voltage dV. In other words, the current on the power transistor exceeds the maximum current that is allowed to be generated.